Asynchronous FIFO Buffer Demonstrator Board

Sun Microsystems Laboratories Engineering, 2000-01

Liaison(s): Ian Jones, John Gainsley, Jon Lexau
Advisor(s): Ruye Wang
Students(s): Nicholas Bodnaruk (TL), Zehao Chang, Andrew Ingram, Sean Kao

In modern digital systems, synchronous (clocked) circuitry is the standard method of design. There are many situations, however, where a digital system may benefit from an asynchronous (clock-free) component. Sun Microsystems Laboratories has tasked our Clinic team to design and implement an asynchronous FIFO buffer demonstrator board that will serve as an educational tool to teach and explain the benefits of asynchronous circuit designs for high-speed data communication.